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RT8474A ? ds8474a-05 april 2015 www.richtek.com 1 ? copyright 2015 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. applications ? desk lights and room lighting ? industrial display backlight general description the RT8474A is a current-mode led driver supporting wide input voltage range from 4.5v to 50v in multiple topologies. with the internal 500khz operating frequency, the size of the external pwm inductor and input/output capacitors can be minimized. high efficiency is achieved by a 100mv current sensing control. led dimming control can be done from either analog or pwm signal. the RT8474A provides an internal soft-start function to avoid inrush current and thermal shutdown to prevent the device from overheat. the RT8474A is available in the sop-8 (exposed pad) package. simplified application circuit high voltage multiple-topology led driver with open detection features ? ? ? ? ? high voltage : v in up to 50v, v out up to 50v ? ? ? ? ? support multiple-topologies (buck / boost / buck- boost) ? ? ? ? ? built-in 2a power switch ? ? ? ? ? current-mode pwm control ? ? ? ? ? 500khz fixed switching frequency ? ? ? ? ? analog or pwm control signal for led dimming ? ? ? ? ? internal soft-start to avoid inrush current ? ? ? ? ? ovp pin for adjustable ovp level protection (for buck only) ? ? ? ? ? under-voltage lockout ? ? ? ? ? thermal shutdown ? ? ? ? ? rohs compliant and halogen free ordering information note : richtek products are : ? rohs compliant and compatible with the current require- ments of ipc/jedec j-std-020. ? suitable for use in snpb or pb-free soldering processes. marking information RT8474Agsp : product number ymdnn : date code RT8474A gspymdnn RT8474A package type sp : sop-8 (exposed-option 2) lead plating system g : green (halogen free and pb free) RT8474A isn ovp vcc creg vc gnd sw isp analog dimming or pwm dimming ctl c3 c1 r3 r4 l1 d1 c4 v in r sense r1 c2 r2 c5 r5
RT8474A 2 ds8474a-05 april 2015 www.richtek.com ? copyright 2015 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. functional pin description pin no. pin name pin function 1 vcc supply voltage input. for good bypass, connect a low esr capacitor between this pin and gnd. 2 isp positive current sense input. 3 isn negative current sense input. voltage threshold between isp and isn is 100mv. 4 ovp over-voltage protection sense input. ovp pin is used for ovp protection function in buck topology only. the ovp pin must be tied to isp pin in boost and buck-boost topologies. 5 vc compensation node for current loop. 6 ctl analog dimming control input. effective programming range is 0.2v to 1.2v. 7 sw switch node of the pwm converter. 8 creg regulator output for internal circuit. place a 1 ? f capacitor to stabilize the 5v output regulator. 9 (exposed pad) gnd ground. the exposed pad must be soldered to a large pcb and connected to gnd for maximum power dissipation. pin configurations (top view) vcc isp isn ovp creg sw vc ctl gnd 2 3 4 5 6 7 8 9 sop-8 (exposed pad)
RT8474A 3 ds8474a-05 april 2015 www.richtek.com ? copyright 2015 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. function block diagram operation the RT8474A can be used in multiple topologies. in buck converter applications, an ovp pin is specially designed to be used for an over voltage protection function. RT8474A uses a fixed frequency, current-mode control scheme to provide excellent line and load regulation. the control loop has a current sense amplifier which senses the voltage between the isp and isn pins and provides an output voltage at the vc pin. a pwm comparator then turns off the internal power switch when the sensed power switch current exceeds the compensated vc pin voltage. the power switch will not be reset by the oscillator clock in each cycle. if the comparator does not turn off the switch in a cycle, the power switch will be on for more than a full switching period until the comparator is tripped. in this manner, the programmed voltage across the sense resistor is regulated by the control loop. the current through the sense resistor is set by the programmed voltage and the sense resistance. the voltage across the sense resistor can be programmed by the analog or digital signal at the ctl pin. the RT8474A provides protection functions which include over- temperature, and switch current limit to prevent abnormal situations. r s osc + - - + 4.5v isp - 1.2v + - + - + - gm isp isn ctl vcc gnd vc ovp r sw soft-start 5v ldo creg
RT8474A 4 ds8474a-05 april 2015 www.richtek.com ? copyright 2015 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. electrical characteristics recommended operating conditions (note 5) ? supply input v oltage ------------------------------------------------------------------------------------------------------ 4.5v to 50v ? junction temperature range -------------------------------------------------------------------------------------------- ? 40 c to 125 c ? ambient temperature range -------------------------------------------------------------------------------------------- ? 40 c to 85 c (v cc = 5v, c in = 1 f, t a = 25 c, unless otherwise specified) absolute maximum ratings (note 1) ? supply input v oltage, vcc ---------------------------------------------------------------------------------------------- ? 0.3v to 60v ? sw pin voltage at switching off, isp, isn, ovp ------------------------------------------------------------------ ? 0.3v to 60v ? creg voltage -------------------------------------------------------------------------------------------------------------- ? 0.3v to 6v ? ctl voltage (note 2) ---------------------------------------------------------------------------------------------------- ? 0.3v to 20v ? power dissipation, p d @ t a = 25 c sop-8 (exposed pad) --------------------------------------------------------------------------------------------------- 3.44w ? package thermal resistance (note 3) sop-8 (exposed pad), ja ---------------------------------------------------------------------------------------------- 29 c/w sop-8 (exposed pad), jc --------------------------------------------------------------------------------------------- 2 c/w ? junction temperature ----------------------------------------------------------------------------------------------------- 150 c ? lead temperature (soldering, 10 se c.) ------------------------------------------------------------------------------- 260 c ? storage temperature range -------------------------------------------------------------------------------------------- ? 65 c to 150 c ? esd susceptibility (note 4) hbm (human body model) ---------------------------------------------------------------------------------------------- 2kv mm (ma chine model) ----------------------------------------------------------------------------------------------------- 200v parameter symbol test conditions min typ max unit overall regulator output voltage v creg i creg = 20ma 4.5 5 5.5 v supply current i vcc vc ? 0.4v -- -- 3 ma v in rising -- 4.2 4.5 vin under-voltage lockout threshold v uvlo v in falling 3.9 4.1 -- v current sense amplifier input threshold (v isp ?? v isn ) v ctl ? 1.25v 97 100 103 mv input current i isp v isp = 24v -- 200 -- ? a input current i isn v isn = 24v -- 20 -- ? a output current i vc 2.4v > vc > 0.3v -- 10 -- ? a vc threshold for ctl switch off -- 0.4 -- v led dimming input current of ctl pin i ctl 0.2v ? v ctl ? 1.2v -- 1 2 ? a led current off threshold at ctl v ct l_of f 0.15 0.2 0.25 v led current on threshold at ctl v ct l_on -- 1.2 1.5 v
RT8474A 5 ds8474a-05 april 2015 www.richtek.com ? copyright 2015 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. note 1. stresses beyond those listed ? absolute maximum ratings ? may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions may affect device reliability. note 2. if connected with a 20k serial resistor, pwm can go up to 40v. note 3. ja is measured at t a = 25 c on a high effective thermal conductivity four-layer test board per jedec 51-7. jc is measured at the exposed pad of the package. note 4. devices are esd sensitive. handling precaution is recommended. note 5. the device is not guaranteed to function outside its operating conditions. note 6. guarantee by design, not subject to production testing. parameter symbol test conditions min typ max unit pwm converter switch frequency f sw 440 500 540 khz maximum duty cycle d max -- -- 100 % minimum on-time -- 100 200 ns sw r ds(o n) -- 0.15 -- ? sw current limit i lim_sw 2 2.5 -- a over-voltage protection and soft-start ovp threshold v ovp v isp ? v ovp 1.15 1.2 1.25 v ovp recovery v ovp = 1.2v -- 1 -- v ovp input current i ovp v ovp ? 1.5v -- 30 -- ? a soft-start time (note 6) -- 5.7 -- ms over-temperature protection thermal shutdown threshold t sd -- 150 -- ? c thermal shutdown hysteresis ? t sd -- 20 -- ? c
RT8474A 6 ds8474a-05 april 2015 www.richtek.com ? copyright 2015 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. typical application circuit boost configuration buck configuration RT8474A isn vcc v in 1 creg vc r1 10k 5 8 gnd sw isp analog dimming or pwm dimming ctl 6 2 7 3 9 (exposed pad) r sense c2 c3 c1 3.3nf 1f l1 d1 4.5v to 50v 100mv r2 5.1m c5 1f r5 10 r4 (short option) r5 (short option) note : v in , v sw , v isp , v isn < 50v ovp 4 r3 r4 c4 RT8474A isn vcc v in 1 creg vc r3 10k 5 8 gnd sw isp analog dimming or pwm dimming ctl 6 2 7 3 9 (exposed pad) c5 c2 c1 3.3nf 1f d1 c3 1f r2 10 10f l1 22h c4 1f r1 0.1 51r v z > v led note : 1. v in , v sw , v isp , v isn < 50v 2. vled : the voltage across the led string 3. vz : zener diode breakdown voltage 20r v z v led 50v (max) ovp 4
RT8474A 7 ds8474a-05 april 2015 www.richtek.com ? copyright 2015 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. buck-boost configuration RT8474A isn vcc v in 1 creg vc r3 10k 5 8 gnd sw isp analog dimming or pwm dimming ctl 6 2 7 3 9 (exposed pad) c5 c2 c1 3.3nf 1f d1 c3 1f r2 10 10f l1 22h c4 1f r1 0.1 v led 51r v z > v led 20r v z note : 1. v sw < 50v, v in + v led < 50v 2. vled : the voltage across the led string 3. vz : zener diode breakdown voltage ovp 4
RT8474A 8 ds8474a-05 april 2015 www.richtek.com ? copyright 2015 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. efficiency vs. input voltage 50 55 60 65 70 75 80 85 90 95 100 5 101520253035404550 input voltage (v) efficiency (%) led = 6pcs led = 5pcs led = 4pcs led = 3pcs led = 2pcs led = 1pcs i out = 340ma, l = 47 h isp-isn threshold vs. temperature 70 80 90 100 110 120 -50 -25 0 25 50 75 100 125 temperature (c) isp-isn threshold (mv) typical operating characteristics supply current vs. vcc 1.90 1.95 2.00 2.05 2.10 2.15 2.20 2.25 2.30 0 5 10 15 20 25 30 35 40 45 50 vcc (v) supply current (ma ) icc led current vs. v ctl 0 50 100 150 200 250 300 350 400 450 0 0.5 1 1.5 2 2.5 3 v ctl (v) led current (ma) r sens = 300m , led = 6pcs sw r ds(on) vs. vcc 0.170 0.172 0.174 0.176 0.178 0.180 0 5 10 15 20 25 30 35 40 45 50 vcc (v) r ds(on) ( ) v cc = 24v v cc = 24v sw r ds(on) vs. temperature 0.14 0.18 0.22 0.26 0.30 -50 -25 0 25 50 75 100 125 temperature (c) r ds(on) ( ) v cc = 24v
RT8474A 9 ds8474a-05 april 2015 www.richtek.com ? copyright 2015 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. ovp voltage vs. temperature 0.9 1.0 1.1 1.2 1.3 -50 -25 0 25 50 75 100 125 temperature (c) ovp voltage (v) v cc = 24v v ovp ovp recovery time (25ms/div) power on from vcc v out (20v/div) v in (20v/div) i out (200ma/div) v in = 24v, i out = 340ma, l = 47 h, led = 6pcs time (250ms/div) ovp turn on when led take off and restore v out (20v/div) v in (20v/div) i out (500ma/div) v ovp (1v/div) v in = 30v, i out = 340ma, l = 47 h, led = 7pcs frequency vs. vcc 480 485 490 495 500 505 510 0 5 10 15 20 25 30 35 40 45 50 vcc (v) frequency (khz ) v in = 24v, i out = 340ma, l = 47 h, led = 6pcs time (50ms/div) power off from vcc v out (20v/div) v in (20v/div) i out (200ma/div) v in = 24v, i out = 340ma, l = 47 h, led = 6pcs time (2.5 s/div) switching v out (20v/div) v in (20v/div) i out (200ma/div) sw (50v/div) v in = 24v, i out = 340ma, l = 47 h, led = 6pcs
RT8474A 10 ds8474a-05 april 2015 www.richtek.com ? copyright 2015 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. out out lin(max) vv l = 1 fi v ?? ?? ?? ?? ?? ?? ?? ?? application information the RT8474A can be used in multiple topologies. in buck converter applications, an ovp pin is specially designed to be used for an over voltage protection function. RT8474A uses a fixed frequency, current-mode control scheme to provide excellent line and load regulation. the control loop has a current sense amplifier which senses the voltage between the isp and isn pins and provides an output voltage at the vc pin. a pwm comparator then turns off the internal power switch when the sensed power switch current exceeds the compensated vc pin voltage. the power switch will not be reset by the oscillator clock in each cycle. if the comparator does not turn off the switch in a cycle, the power switch will be on for more than a full switching period until the comparator is tripped. in this manner, the programmed voltage across the sense resistor is regulated by the control loop. frequency compensation the RT8474A has an external compensation pin, allowing the loop response to be optimized for specific applications. an external resistor in series with a capacitor is connected from the vc pin to gnd to provide a pole and a zero for proper loop compensation. the typical value for the RT8474A is 10k and 3.3nf. led current setting the led current can be calculated by the following equation : ?? ? isp isn led(max) sense vv i = r where (v isp ? v isn ) is the voltage between the isp and isn pins (100mv typ. if ctl dimming is not applied) and the r sense is the resister between the isp and isn pins. current limit the RT8474A can limit the peak switch current with its internal over-current protection feature. in normal operation, the power switch is turned off when the switch current hits the loop-set value. the over-current protection function will turn off the power switch independent of the loop control when the peak switch current reaches around 2a. output over-voltage setting the RT8474A ovp pin provides the over-voltage protection (ovp) function for buck topology only. the ovp sense threshold is referenced to the top side of the led string with hysteresis. when the voltage difference between the isp pin and the ovp pin exceeds a threshold of approximately 1.2v, the power switch will be turned off. the power switch can be turned on again once the voltage difference between the isp pin and ovp pin drops below 1v. the ovp protection voltage level can be set by the resistor divider r3 and r4 across the output capacitor c4 between isp pin and the bottom end of the led string, with the center node of the resistor divider tied to the ovp pin. typically, set r4 = 10k ?is sugge sted. over-temperature protection the RT8474A has over-temperature protection (otp) function to prevent the excessive power dissipation from overheating. the otp function will shut down switching operation when the die junction temperature exceeds 150 c. the chip will automatically start to switch again when the die junction temperature cools off. inductor selection choose an inductor that can handle the necessary peak current without saturating and ensure that the inductor has a low dcr (copper-wire resistance) to minimize i 2 r power losses. a 4.7 h to 22 h inductor will meet the demand of most of the RT8474A applications. inductor manufacturers specify the maximum current rating as the current where the inductance falls to certain percentage of its nominal value, typically 65%. in multiple-topology application where the transition between discontinuous and continuous modes occurs, the value of the required output inductor, l, can be approximated by the following equation : for buck application :
RT8474A 11 ds8474a-05 april 2015 www.richtek.com ? copyright 2015 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. where, v out = output voltage. v in = input voltage. i out = led current. f = switching frequency. = efficiency. schottky diode selection the schottky diode, with their low forward voltage drop and fast switching speed, is necessary for RT8474A applications. in addition, power dissipation, reverse voltage rating and pulsating peak current are important parameters of the schottky diode that must be considered. the diode's average current rating must exceed the average output current. the diode conducts current only when the power switch is turned off (typically less than 50% duty cycle). ?? ???? ?? ?? ?? out l out 1 v i esr + 8fc thermal considerations for continuous operation, do not exceed the maximum operation junction temperature 125 c. the maximum power dissipation depends on the thermal resistance of ic package, pcb layout, the rate of surroundings airflow and temperature difference between junction to ambient. the maximum power dissipation can be calculated by following formula : p d(max) = ( t j(max) ? t a ) / ja where t j(max) is the maximum operation junction temperature, t a is the ambient temperature and the ja is the junction to ambient thermal resistance. for recommended operating conditions specifications, the maximum junction temperature is 125 c. the junction to ambient thermal resistance, ja, is layout dependent. for sop-8 (exposed pad) package, the thermal resistance ja is 29 c/w on the standard jedec 51-7 four-layer thermal test board. the maximum power dissipation at t a = 25 c can be calculated by following formula : p d(max) = (125 c ? 25 c) / (29 c/w) = 3.44w for sop-8 (exposed pad) package the maximum power dissipation depends on operating ambient temperature for fixed t j(max) and thermal resistance ja . the deration curve in figure 1 allows the designer to see the effect of rising ambient temperature on the maximum power allowed. out out l in l peak out vv i = 1 fl v i i = i+ 2 ??? ? ??? ??? ? ? ??? ? ? the ripple current i l and peak current i peak can be calculated : for boost application : in in lout vv l = 1 fi v ?? ?? ?? ?? ?? ?? ?? ?? the ripple current i l and peak current i peak can be calculated : in in l out out out l peak in vv i = 1 fl v iv i i = + v2 ? ?? ?? ??? ?? ?? ? ?? ?? ?? ? ? ?? ? ?? capacitor selection the input capacitor reduces current spikes from the input supply and minimizes noise injection to the converter. for most RT8474A applications, a 4.7 f ceramic capacitor is sufficient. a value higher or lower may be used depending on the noise level from the input supply and the input current to the converter. in buck application, the output capacitor is typically ceramic and selection is mainly based on the output voltage ripple requirements. the output ripple, v out , is determined by the following equation : for buck-boost application : out out linout vv l = 1 if v + v ??? ? ?? ??? ? ?? ??? ? the ripple current i l and peak current i peak can be calculated : ?? out out l in out in out out l peak in vv i = 1 lf v + v v + v i i i = + v2 ? ??? ? ??? ??? ? ? ??? ? ?? ? ? ?? ? ?? ??
RT8474A 12 ds8474a-05 april 2015 www.richtek.com ? copyright 2015 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. layout considerations pcb layout is very important when designing power switching converter circuits. some recommended layout guide lines are as follows : ? the power components l1, d1 and c4 must be placed as close to each other as possible to reduce the ac current loop area. the pcb trace between power components must be as short and wide as possible due to large current flow through these traces during operation. ? place l1 and d1 as close to each other as possible. the trace should be as short and wide as possible. ? the input capacitor c5 must be placed as close to the vcc pin as possible. ? place the compensation components to the vc pin as close as possible to avoid noise pickup. figure 2. pcb layout guide gnd r1 c3 c2 ... d1 l1 r sense v in c1 locate input capacitor as close to vcc as possible. locate the compensation components to vc pin as close as possible. place these components as close as possible. vcc isp isn ovp creg sw vc ctl gnd 2 3 4 5 6 7 8 9 r4 gnd isn c4 ovp r3 keep the isp and isn with the kelvin sense connection. isp r2 gnd c5 r5 normal trace. vin power trace to isp must be wide and short. power trace must be wide and short when compared to the normal trace. figure 1. derating curve of maximum power dissipation 0.0 0.6 1.2 1.8 2.4 3.0 3.6 0 25 50 75 100 125 ambient temperature (c) maximum power dissipation (w) 1 four-layer pcb
RT8474A 13 ds8474a-05 april 2015 www.richtek.com richtek technology corporation 14f, no. 8, tai yuen 1 st street, chupei city hsinchu, taiwan, r.o.c. tel: (8863)5526789 richtek products are sold by description only. richtek reserves the right to change the circuitry and/or specifications without notice at any time. customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a richtek product. information furnish ed by richtek is believed to be accurate and reliable. however, no responsibility is assumed by richtek or its subsidiaries for its use; nor for any infringeme nts of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of r ichtek or its subsidiaries. a b j f h m c d i y x exposed thermal pad (bottom of package) 8-lead sop (exposed pad) plastic package dimensions in millimeters dimensions in inches symbol min max min max a 4.801 5.004 0.189 0.197 b 3.810 4.000 0.150 0.157 c 1.346 1.753 0.053 0.069 d 0.330 0.510 0.013 0.020 f 1.194 1.346 0.047 0.053 h 0.170 0.254 0.007 0.010 i 0.000 0.152 0.000 0.006 j 5.791 6.200 0.228 0.244 m 0.406 1.270 0.016 0.050 x 2.000 2.300 0.079 0.091 option 1 y 2.000 2.300 0.079 0.091 x 2.100 2.500 0.083 0.098 option 2 y 3.000 3.500 0.118 0.138 outline dimension

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